<p>2. What is Structural modelling in VHDL? What are itsadvantages?</p><p>3. Write a VHDL code to implement a basic 4:1Multiplexer:</p><p><img alt="Do 4 D1 D2 D3 Si S0" src="https://media.cheggcdn.com/media%2F230%2F230db96c-fdd6-4c66-8c4d-7fa0a86df8b7%2FphpSNdwT2.png" style="height:209px;width:227px;" aria-describedby="d3f"/></p>Do 4