<p><img alt="Phase 1: Complete the design of all registers, flip-flops, counters, multiplexers, decoders, encoders, and memory unit of the" src="https://media.cheggcdn.com/media%2F3ab%2F3ab51dff-7694-4b0f-bdb7-8c2e69d41f09%2FphpKcMC1p.png" style="height:492px;width:398px;" aria-describedby="d3f"/></p>Phase 1: Complete the design of all registers, flip-flops,