Course Solutions Uncategorized (Solved) : Consider Following Fico Pipeline Disp Exwb Assumptions Ex Takes 2 Pipelined Cycles Lw 1 Cy Q27450097 . . . .

(Solved) : Consider Following Fico Pipeline Disp Exwb Assumptions Ex Takes 2 Pipelined Cycles Lw 1 Cy Q27450097 . . . .

 

Consider the following FICO pipeline: IF DISP EXWB Assumptions: EX takes 2 (pipelined) cycles for LW, and 1 cycle for ADD . There is only one ADD unit and one LW unit. Fetch width = 2. The DISP queue is unlimited in length. When an instruction completes and clears the busy bit on its destination register, any instruction waiting in DISP for that register can fire in the same cycle. Show the pipeline timing diagram for the following sequence of instructions A. LW R1,0(R2) B. ADD R3,R1,R2 C. ADD R5,R4,R2 D. LW R6,0(R4) F. ADD R8,R6,R3 Instru Cycle Cycle Cycle Cycle Cycle Cycle Cycle Cycle Cycle Cycle ction 1 23567 8910

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