![Consider the following code and its address mapping. Assume that we are running the code on a Cortex-M3 processor, which uses Thumb mode only. Fill the PC and LR register values in each specified condition 1. Address Code a. After executing BL in main function main PROC PC-( LR = ( 0x00000100 0x00000104 BL sub1 b After execu ting BL in subl function ENDP PC-( LR subl PROC 0x00000150 PUSH LR c. After executing BX in subl function 0x00000164 0x00000168 0x0000016C BL sub2 POP LR) BX LR ENDP PC-( LR = ( d.After executing BL in sub2 function sub2 PROC PC-( 0x00000174 PUSH LR 0x0000017c 0x00000180 0x00000184 0x00000188 BL sub3 STR RO, [R3] POP LR) BX LR ENDP e. Afte r executing BX in sub2 function PC-( LR = ( f. After execu ting BX in sub3 function sub3 PROC PC( 0x0000018C BX LR ENDP](../../../media.cheggcdn.com/media/015/015662dd-5aec-4731-802a-e015fb28be09/phpneF2h4.png)
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(Solved) : Consider Following Code Address Mapping Assume Running Code Cortex M3 Processor Uses Thumb Q32729249 . . . .
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