Consider a Core based CPU that has an L2 cache size of 2048KBper core, in 8-way set-associative and 128-byte line/blocksize.
a. How many rows of L2 cache does each core have?
b. How many bits in the memory address are used asoffset in this L2 cache line/block?
c. How many bits in the memory address are used asindex to find the row in this L2 cache?
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