Complete the VERILOG sequence generator
R0=4; Repeat R0=5*R0
Complete the sequence generator that produces the sequence: 4,20, 100, 500, … . The initial value is 4, each following value ismultipled by 5.
The controller can be done using 9 states. First draw a stategraph of the controller, then complete the provided FSM. The resetand first state are already completed.
module controller( output as_ctl_t as_ctl, output shift_ctl_t shift_ctl, output logic r1_ld, r0_ld, output logic ready, input logic next, input clk, reset); logic [3:0] step; task ctrl(logic rdy, as_ctl_t as, shift_ctl_t sh, logic r1,
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