Can you do a circuit diagram for a counter circuit that willgenerate two sequences (shown in pictures)? It should use dual JKflip-flops (type 7476), two input NAND gates (type 7400) and threeinput NAND gates (type 7410).

0001 0100 0101 1110 0010 MOD 10 sequence MOD 4 sequence 0110 0011 1100 1011 0111 1001 1000 Figure 1. State diagram of the counter using Mod 10 and
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