The basic single cycle MIPS implementation in above figure canonly implement some instructions. New instructions can be added toan existing Instruction Set Architecture (ISA), but the decisionwhether or not to do that depends, among other things, on the costand complexity the proposed addition introduces into the processordatapath and control. We want to add the following instruction toISA:
Instruction: SWI Rt,Rd(Rs) NOT LWI
Interpretation: Mem[Reg[Rd]+Reg[Rs]] = Reg[Rt]
a. Which existing blocks (if any) can be used for thisinstruction?
b. Which new functional blocks (if any) do we need for thisinstruction?
c. What new signals do we need (if any) from the control unit tosupport this instructi
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