<br/><img src="https://media.cheggcdn.com/media%2F8fa%2F8fa3bc11-f4d8-42a2-b073-d83774331f06%2Fimage" alt="CMPEN331-Qiz4(uly 20th, 2018) Section: Name: Major: Email: 1. (20 points) We found that the instruction fetch and memory stages are the critical path of our S-stage pipelined MIPS