Given the data path of a CPU as in Assignment 4. Consideranother instruction set,
which allows memory operands, and the addressing mode informationis stored in the
same byte as the register operand. Describe the datatransfer/transformation for the
following 2-word instruction:
ADD OFF(R1), R2, R3
which will get the rst operand from memory whose address isgiven by OFF+R1 (dis-
placement addressing mode), add it to R2 and put the result in R3.OFF is stored in
the word following the instruction:
ADDR1(disp mode)R2R3OFF
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